AnsweredAssumed Answered

ADUC706x : I2C TX FIFO

Question asked by Spock on Sep 20, 2012
Latest reply on Sep 24, 2012 by MikeL

Hi

 

If I understand correctly during a master transmission the STOP bit is generated if the TX fifo is empty. So, if for any reason you cannot feed the transmitter with data, a STOP may be created. My coclusion : Avoid polled mode with I2C.

 

Is this correct ?

Outcomes