I have been using the AD5680 for several years.
I am experiencing a problem recently where the output does not update. It is frozen, holding a last value written.
I can see the data (chip select, SCK, SDO) with logic analyzer and all is normal.
I can stop and restart the program and the problem persists.
ONLY if I power down and reload will operation return to normal.
It may run correctly for minutes or hours or days but then locks up again.
I think I am a victim of SYNC INTERRUPT In a normal write sequence, the SYNC line is kept low for at least 24 falling edges of SCLK, and the DAC is updated on the 24th falling edge. However, if SYNC is brought high before the 24th falling edge, this acts as an interrupt to the write sequence. The shift register is reset and the write sequence is seen as invalid. Neither an update of the DAC register contents nor a change in the operating mode occurs (see Figure 26).
I have experimented with providing additional clocking, etc. to clear this lock up but cannot clear the lockup unless I cycle power.
I am obeying all the rules of timing (as best as I can tell). SCLK is 100ns period.