There is a possibility to goes down to 50MHz RF output in ADRF6755?
I suppose that with minimum LO frequency of 144,375MHz i can generate down to 72.1875MHz but, why the specified minimum frequency is 100MHz? Maybe there is others hardware limitations to do this...?
Why there isn't a additional LO prescaler to allow to go to lower frequencies?
I think that Analog is made the same error of ADF4350 PLL/VCO also with this IC....
The newer ADF4351 have also additional LO dividers... I suppose that the internal architecture of ADRF6755 LO is the same of ADF PLL/VCO series.
Why the ADRF6755 not contains additional dividers like ADF4351?
Unfortunately, this issue affects my application and I have a big limitation to use the this new "very nice" IC in my complete applications range.
Anybody know if is scheduled in ADI roadmap a new component that allow to generate down to 50MHz or lower?