I have lots of design with DDS ICs. I used different companies DDS and I had lots of problem with DDSs. However one of the biggest problem was wrong information on a competitors datasheet which highlighted a typical speed of 3 GHz which was faster than the guaranteed maximum speed of 2.8 GHz. we finished design based upon the highlighted speed and we manufactured the board with that IC. During rf performance tests we had a very big problem. Measurements on the datasheet got with screened products which can work with 3GHz clk. But 10% of IC that we supplied could run with that rate. At the end we redesigned the board for 2.8 GHZ. It took up to 8 mounts from us. Because It is very difficult to find that problem.
I want to know, when AD9914 was released, I have changed all my design based on AD9914. Analog says that IC can run 3.5GHZ external clk. Is this typical or guaranteed rate of clk?
If 3,5GHz clk is not guaranteed rate, what is the guaranteed rate of external clk?
Message was edited by: Jeff Keip EngineerZone provides communities that support Analog Devices products. It’s generally ADI’s policy not to comment on competitor product performance in the community. To make it relevant to this community, portions of this question were altered to remove references and performance details about a product from a competitor and to highlight the portion that is relevant to ADI’s product offering. The italicized portion indicates where the text was altered.