We are using ADV7441a in a custom board for various SD/HD capture formats . So far we have been successfully able to capture the following formats and able to detect the resolution properly :
CVBS input (480i) and 8-bit YCbCr 422 with embedded sync
CVBS input (576i) and 8-bit YCbCr 422 with embedded sync
Component in/p (720p@60) and 16-bit YCbCr 422 with embedded sync
Component i/p (1080i@60) and 16-bit YCbCr 422 with embedded sync
The output of ADV7441a is given to resolution detector .
For all these above captures, we are able to detect the output resolution properly and the status registers reflect the lock status correctly.
When ADV7441a is configured for component i/p (1080p@60) capture and 16-bit YcbCr 422 embedded sync output, the resolution detector is unable to detect the resolution and the value keeps changing although the CP valid video status reflects correctly . Also the pixel clock is correct (148.5 Mhz) .
Can anybody confirm the following register settings for 1080p@60 comp capture and 16-bit YcbCr 422 embedded sync output ?
User map addr Register offset Value
0x42 0x03 0x09,
0x42 0x05 0x01,
0x42 0x06 0x0B,
0x42 0x1D 0x40,
0x42 0x3C 0xA8,
0x42 0x7C 0x00,
0x42 0x47 0x0A,
0x42 0x6B 0xF3,
0x42 0x85 0x19,
0x42 0xBA 0xA0