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ADV7842 DDR clock termination

Question asked by oldyazoo on Sep 7, 2012
Latest reply on Sep 7, 2012 by oldyazoo

The reference schematic uses two series resistors for the termination of SDRAM_CK and SDRAM_CKn. Why are they not terminated in parallel with a resistor between them? Are they a differential pair or just two serial outputs where one is the inverse of the other?