I have a few queries regarding the application of ADV 202 p160 SD Development board. They are as under:
1) In which mode is the adv202 configured by default (normal host data, jdata or dma)?
2) Can we tap out compressed signals from the output of ADV202 (encoder) chip to use them external to the board?
3) If answer to above question is yes, then how?
4) Is it possible to reprogram the FPGA with our custom RTL that does not have any provision for configuration of the board?
Thanks in advance!