I have a 300MHz 50Ω single-ended clock, and want to derive 450MHzand 300MHz output which are phase aligned to the input.
I have chosen AD9517 for its excel performance. But the max ref in of AD9517 is 250MHz. What can I do?
Do I have to use a clock divider befor feeding the input to ref in of AD9517?
What kind of low jitter clock divider ADI can provide?