When we are connecting multiple high speed DACs (with Parallel IO) to a single FPGA, there will be huge IO requirement at the FPGA.
In this case, it is difficult to connect DCO (Data Clock Out) signals from each DAC to the FPGA.
So can we use single DCO from first DAC and assume that it is sufficient to place data on to all DACs based on the first DCO? We are providing common sampling clock to all DACs. Or is it absolute necessary to connect all the DCOs to the FPGAs?
Thanks in advance