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ADV7353 RGB to SD video

Question asked by HankZ on Aug 13, 2012
Latest reply on Aug 20, 2012 by DaveD

The desired output is a 4:3 aspect ratio. Since the RS170 specification defines the number of lines to be 525 and the line length to be 400-700 the desired aspect is 700:525 (or 4:3).

The image currently being outputted is a RGB 640:480 image where the ADV7343 appears to be stretching the image in the vertical direction across 525 lines but in the horizontal direction the image 640 pixels are outputted with 80 pixels of padding, where the 640 pixel value is replicated for pixels 641-720 (or for the last 80 pixels). The desire is to have the ADV7343 stretch the 640 line length to 700, can the chip be configured to do this (chip input configuration can be changed, clock and/or register programmed values)?

The current input clock is 27MHZ.

The current configuration of the chip registers is as follows (*_REG_ADDRSS – register address, *_DATA_BYTE – is hexadecimal value written to the register):


#define ADV7343_POWER_MODE_REG_ADDRESS 0x00
#define ADV7343_POWER_MODE_DATA_BYTE 0x1C

#define ADV7343_MODE_SELECT_REG_ADDRESS 0x01
#define ADV7343_MODE_SELECT_DATA_BYTE 0x00

#define ADV7343_MODE_REGISTER_0_REG_ADDRESS 0x02
#define ADV7343_MODE_REGISTER_0_DATA_BYTE 0x60

#define ADV7343_DAC1_3_LEVEL_REG_ADDRESS 0x0B
#define ADV7343_DAC1_3_LEVEL_DATA_BYTE 0x00

#define ADV7343_DAC_POWER_MODE_REG_ADDRESS 0x0D
#define ADV7343_DAC_POWER_MODE_DATA_BYTE 0x00

#define ADV7343_SOFTWARE_RESET_REG_ADDRESS 0x17
#define ADV7343_SOFTWARE_RESET_DATA_BYTE_ASSERT 0x02
#define ADV7343_SOFTWARE_RESET_DATA_BYTE 0x00

#define ADV7343_SD_MODE_1_REG_ADDRESS 0x80
#define ADV7343_SD_MODE_1_DATA_BYTE 0x10

#define ADV7343_SD_MODE_2_REG_ADDRESS 0x82
#define ADV7343_SD_MODE_2_DATA_BYTE 0xCB

#define ADV7343_SD_MODE_3_REG_ADDRESS 0x83
//#define ADV7343_SD_MODE_3_DATA_BYTE 0x00
#define ADV7343_SD_MODE_3_DATA_BYTE 0x04

#define ADV7343_SD_MODE_4_REG_ADDRESS 0x84
#define ADV7343_SD_MODE_4_DATA_BYTE 0x08

#define ADV7343_SD_MODE_5_REG_ADDRESS 0x86
#define ADV7343_SD_MODE_5_DATA_BYTE 0x01

#define ADV7343_SD_MODE_6_REG_ADDRESS 0x87
#define ADV7343_SD_MODE_6_DATA_BYTE 0x80

#define ADV7343_SD_MODE_7_REG_ADDRESS 0x88
#define ADV7343_SD_MODE_7_DATA_BYTE 0x10

#define ADV7343_SD_MODE_8_REG_ADDRESS 0x89
#define ADV7343_SD_MODE_8_DATA_BYTE 0x00

#define ADV7343_SD_TIMING_0_REG_ADDRESS 0x8A
#define ADV7343_SD_TIMING_0_DATA_BYTE 0x0B

#define ADV7343_SD_TIMING_1_REG_ADDRESS 0x8B
#define ADV7343_SD_TIMING_1_DATA_BYTE 0x00

#define ADV7343_PEDESTAL_0_REG_ADDRESS 0x95
#define ADV7343_PEDESTAL_0_DATA_BYTE 0x00

#define ADV7343_PEDESTAL_1_REG_ADDRESS 0x96
#define ADV7343_PEDESTAL_1_BYTE 0x00

#define ADV7343_PEDESTAL_2_REG_ADDRESS 0x97
#define ADV7343_PEDESTAL_2_DATA_BYTE 0x00

#define ADV7343_PEDESTAL_3_REG_ADDRESS 0x98
#define ADV7343_PEDESTAL_3_DATA_BYTE 0x00


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