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Ultra low skew clock distribution

Question asked by pumpkin on Aug 8, 2012
Latest reply on Aug 14, 2012 by pumpkin



I need an ultra low skew clock distribution scheme :


1 to 36 @300MHz

clock skew between any 2 clock paths : < 20 ps


I checked some parts form ADI, and found that the propagation delay between varies too much from path to path.

Could somebody give me a suggestion?




Chao Xiang