I've got a BF527 project that has a USB charger detection chip (STUSBCD01B: http://www.stm.com/stonline/products/literature/ds/15172.pdf) to determine if my device is connected to a host USB port, or a high-power USB wall charger. The detection chip works fine if the rest of my hardware is powered off, but if the BF527 is running, its USB PHY interferes with the D+/D- sensing used by the detection chip.
What I'd like to do is have the BF527 normally run with the PHY hibernated, so D+ and D- are tristated. If a user connects the device to a wall charger or USB port, VBUS goes high. The charge detection chip determines which source is connected within 200ms, so I'd like to have the BF527 sense VBUS appearing, wait at least 200ms (to give the detection chip time to work), and then take the USB PHY out of hibernation so it can operate normally. When the USB input is unplugged, VBUS will go back to zero, and the BF527 would hiberate the PHY driver again.
It looks like bits CS_HBR and CSR_RSTD in USB_APHY_CNTRL2 can do this. Is there any documentation on how using these can interact with the rest of the BF527 USB system. Can I simply hibernate and unhibernate the PHY driver at will, without interferring with the ADI USB driver stack, or do I need to teardown/restart the entire USB subsystem each time? Can VBUS still be sensed when the PHY is in hibernate?
Is there any sample code that shows any use of those bits?