I can successfully configuration overlayA in the way of register configuration. How do I configure to make overlayA and overlayB work simultaneously.
Sorry for delay in getting back to you. As mentioned earlier, I have code for Descriptor list or Descriptor list On Demand mode of DMA for SPORT peripheral. Please find it attached.
This code is basically a loopback between SPORT_A & SPORT0_B and checks the data transfers between them in programmed mode of SPORT & DMA.
All you have to do is, change the macros defined under 'USER Programmable macros' section in the header files (*.h).
DESC_ON_DEMAND macro in the 'common_macro__extern_variables.h' can be set to 1 to DESCLOD mode and 0 for DESCL mode of DMA. This file also defines size of buffer.
SPORT configuration can be find in SPORT_func.h header file. And SPORT DMA related macros in SPORT_DMA_func.h
Modification is Source files (*.c) is not required.
currecntly the trigger (for DMA in DESCLOD mode) choosen in that code is from pushbutton2 (PB2).
If configured in DESCLOD mode, whenever you pressed PB2, next decriptor will be fetched. Only two Descriptors are used here (1-2-1-2-1-......). You can verify that by checking BUFF1_compare_count and BUFF2_compare_count variables whenever you halt the processor.
In this code, alternatively you can use Timer as trigger source.
Sorry for lack of comments in the code. It was written long back. Please go through code and understand the flow/register programming. If you find any difficulty in understanding the code, do let me know.
Hope it helps.
I have moved this question to the ADSP-BF60x community. Someone here should be able to assist you.
EngineerZone Community Manager
There are 2 sets of registers that can be used to specify 2 overlay regions, so that two separate overlay blocks can be defined simultaneously. Furthermore, either or both of these overlay coordinate register sets can be enabled or disabled at one time, since separate enable bits in the PIXC_CTL register (OVAEN and OVBEN) exist in the PIXC control register for each of the overlay register sets.
Also, if there are more than two overlay blocks needed in a given application,the two sets of overlay registers must be managed by the user to perform the additional overlays as follows:
After each interrupt (whether it is a last-valid-overlay interrupt or an end-of-frame interrupt), the PIXC restarts processing with coordinate register set A. In other words, at the time of clearing the interrupt:
1. If coordinate set A is enabled (PIXC_CTL.OVAEN = 1), the PIXC assumes that the first incoming data over the DAB is to be overlaid on the area specified in coordinate set A.
2. If coordinate set A is disabled (PIXC_CTL.OVAEN = 0), and coordinate set B is enabled (PIXC_CTL.OVBEN = 1), the PIXC assumes that the first incoming data is to be overlaid on the area specified in coordinate set B.
Thanks and Regards,
My program has two overlay, but when I enable OVAEN and OVBEN, the pixc0 can not entry the callback function.
interrupt install as follows:
adi_int_InstallHandler((uint32_t)INTR_PIXC0_STAT, adi_adrp_ctl_pixccallback, (void*)0 , true);
configuration DMA36 as follows:
My DMA36 uses "Descriptor On Demand List" mode
mdma_a.config = ENUM_DMA_CFG_DODLIST |
ENUM_DMA_CFG_MSIZE32 | ENUM_DMA_CFG_PSIZE04 |
mdma_a.start = overlayA;
mdma_a.xcount = 32*3/32;
mdma_a.xmodify = 32;
mdma_a.ycount = 32;
mdma_a.ymodify = 32;
mdma_a.next = &mdma_b;
mdma_b.config = ENUM_DMA_CFG_ADDR2D |
mdma_b.start = overlayB;
mdma_b.xcount = 32*3/32;
mdma_b.xmodify = 32;
mdma_b.ycount = 32;
mdma_b.ymodify = 32;
*pREG_DMA36_ADDRSTART = mdma_a.start;
*pREG_DMA36_XCNT = mdma_a.xcount;
*pREG_DMA36_XMOD = mdma_a.xmodify;
*pREG_DMA36_YCNT = mdma_a.ycount;
*pREG_DMA36_YMOD = mdma_a.ymodify;
*pREG_DMA36_DSCPTR_CUR = &mdma_a;
*pREG_DMA36_DSCPTR_NXT = &mdma_b;
*pREG_DMA36_CFG = ENUM_DMA_CFG_DODLIST |
Is it the configuration error?
If you are using "Descriptor On Demand List" mode of DMA, are you configuring Trigger Routing Unit properly? How you are giving trigger to DMA?
Can you give me an example for OverLayA and OverLayB?
I don't know how to configure.
If I use "Descriptor List" mode of DMA, also it can not enter the interrupt.
I have not used the TRU.What is the difference between "Descriptor List" mode and "Descriptor On Demond List" mode?
Can you give me an example for implementation of the two overlay?or more than two?
Thanks very much.
The difference between Descriptor list (or array) mode and Descriptor On Demand list (or array) mode is that in later mode, DMA fetches next descriptor only when it has received programmed trigger.
Please refer Direct Memory Access (DMA) chapter in the BF60x HRM for more details about these modes.
I have an example for these modes, but it is for SPORT module and in the older version of CCES. Let me know if you are interested in that.
Thank you for your help.
Hope you send me the example.
Thank you for your help. I will analyze the code in detail.
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