In the datasheet of the AD9764 analog to digital converter it is said that
"Note, that the clock input could also be driven via a sine wave,
which is centered around the digital threshold (i.e., DVDD/2)"
in page 13 . What happens if we apply the clock signal with 0 V offset (capacitive filtering) rather than 3.3/2=1.8 V ?
Thank you very much