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AD8113 Reset and Update  Timing

Question asked by wallman16 on Aug 2, 2012
Latest reply on Aug 2, 2012 by GuenterL

Hi ,

 

I have a question with regards AD8113 Reset and update timing .

 

All 80 Bits First level Shift register set to H .

To continue the output in disabled state what is the min timing for /UPDATE  L ->  H to /RESET L-.> H  .

 

/UPDT______|~~~~~~~~~~~~~~~~~

/REST___________|~~~~~~~~~~~~

                      <---> ?ns(min)

 

Thanking you

With best regards and wishes

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