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Blackfin Memory Organization

Question asked by tamirci on Jul 30, 2012
Latest reply on Dec 19, 2012 by tamirci


I degined the circuit with following memories and assigments:


     AMS0 ->  512Kbx16-bit FLASH memory -> 0x20000000

     AMS1 ->  512Kbx16-bit FLASH memory -> 0x20100000

     AMS2 ->  128Kbx8 -bit SRAM memory   -> 0x20200000

     AMS3 ->  128Kbx8-bit SRAM memory    -> 0x20300000


     SMS\ABE0 -> 32M8 8-bit SDRAM memory. -> 0x00000000 (131 Mhz with 525Mhz CPU clk)


     My final setting will be "execute from 16-bit external memory". What i thinking on this mode is that when i use VDSP flash loader t will load the executable into flash and when i power on the device it will start with loaded program. is it correct?


     I m creating a project with VDSP and it runs on my board. As fas as i see from the debugger it starts with FFA10000 which corresponds to level 1 intsruction cache because i used seclion (L1_code) asssignment.


I would like use SDRAM, SRAM, FLASH to confirm my board design. is there any application note for memory configruation of bleackfin with code or directly from VDSP? ie, where L1_code is difined? I would like to see other definitions as well?


Best regards.