I am attempting to convert VGA 640x480@60Hz (with seperate HS\VS Syncs) to SDR 20-bit 4:2:2 YCrCb using the ADV7181C.
I have successfully converted Composite and Y\C video to SDR 20-bit 4:2:2 YCrCb using the SD Processor, i.e. with the same hardware.
I have attempted a number of register settings and I have been unable to output anything from the 7181C; no clock or data.
I have listed below the Register Settings I have been using, which were deduced from the ADV7181C Datasheet, the ADV7181C_ADV7181C@_ADV7341-VER.8bit-Out-Encoder.txt file and the AN-0978 Rev.0 App Note.
03 04 Outputs Enabled, 20-bit @ LLC2 4:2:2 LLC selected
04 4B Force HS, VS, F Active
05 02 PRIM_MODE = 0010b for GR Mode Page 216 of Datasheet
06 08 Video Standard = VGA (640x480@60) Page 217 of Datasheet
C3 56 Manually Route RED to Ain5 and GREEN to Ain6
C4 84 Manually Route BLUE to Ain4 and Switch On Manual Muxing
3A 11 LLC Range - Latch Clock to 13.5MHz to 55 MHz \ ADC3 Powered Down
3B 81 Use Internal Bias Resistor
3C 5C Charge Pump set to 100b (350uA) for VGA 640x480, from Table 10, Page 42 of Datasheet
6B C1 HSync and Field output and 20-bit output requested, as per Page 232 of Datasheet
7B 1D Set for RGB Inputs, Page 235 of Datasheet
88 20 PLL_DIV_RATIO set to 800 = 0x320 as per Table 10 of Datasheet (Page 42)
8A 90 VCO_RANGE Manually set to 00 = 21MHz Max, as per Table 10 again
90 8E Automatic LLC_PAD_SEL and Line of Video is 910 (0x38E) x 28,63636MHz Clocks, as per AN-0978
1D 47 28MHz Crystal Mode set
86 1B New STDI "Line Count" Mode used
73 10 Automatic Gain Mode
85 02 Detector in Continuous Mode
F4 3F Drive Strength to Max.
Any assistance would be greatly appreciated.