We are using both input channels of the AD7992 and its power supply is the reference. We use the command mode (mode 2), to set the ADC up and read the data back it. The I2C sequence used is as explained in the datasheet:
<7-bit address + W> ACK < Command/Address byte > ACK <7-bit address + R> ACK < Channel 1 MSByte > ACK < Channel 1 LSByte > ACK < Channel 2 MSByte > ACK < Channel 2 LSByte > NACK
In the command/address byte we send "00110000" - data conversion on both channels, and data register which is address 0. Then a 4-byte read to read both channels.
The first few times we issue the sequence we get both channels back, but then on subsequent sequences we only get data from channel 1, even though we set both channel bits in the command/address byte. Attached are two scope traces of I2C clock and data, the second trace follows on from the first, the marker is set in the same place in order to line the traces up. It can be seen that the two sets of data sent back in the traces are from channel 1, the CHID bit in each MSByte is set to 0.
<01000010> ACK < 00110000 > ACK <01000011> ACK < 00001101 > ACK < 11001100 > ACK < 00001101 > ACK < 11001100 > NACK
We run the I2C interface at roughly 300kHz, but have tried slowing the speed down and this makes no difference.
The I2C interface is connected point to point to an FPGA. What we see on the scope matches simulation of the verilog code.
Can anyone see what we are doing wrong that causes the AD7992 to output data from just one channel twice instead of outputting both channels?
Thanks in advance!!