What is the alternative way to set PLL register during emulation as it is not possible to set PLL with XML
Programming the PLL requires a specific relock sequence after the write to the PLL_CTL MMR, so it cannot be done simply by writing to the PLL_CTL register in a debug window. The easiest way to change the PLL settings is to put the code in the startup section so that it is executed before you get to your main routine (it will be in the code that is in the basiccrt.s file). During runtime, however, you should just insert a call to the bfrom_SysControl() routine and have the processor halt afterwards. This routine executes the proper programming sequence for the BF52x and BF54x processors.
For the sake of addressing the entire Blackfin portfolio, the bfrom_SysControl() function was not on the BF53x and BF561 processors. For those processors, the proper sequence is to issue an atomic write to the PLL_CTL register followed by an IDLE instruction, as shown in this pseudo-code:
A bit addition. If you would keep the PLL frequency (PLL_CTL unchanged), you can directly write to PLL_DIV to change the CCLK and SCLK dividor in the debug window without "idle".
Yes that is correct , but i wanted to know if it is done in XML what are the effects seen on Application operation.
Because on setting the PLL register in XML i see that in some code (not all the codes ) global variable decleared and intialized in SDRAM retain their previous value even after Resetting the processor .
or reload or build and load .
But when i remove the PLL settings it seems to be working (Intializing of variables)
Is Setting values of PLL in XML the cause .
Yes, you are correct. Setting any register values explicitly in the XML file simply allows the emulator to write those registers for you before it downloads your program over the in-circuit emulator or debug agent. The emulator firmware does not execute the programming sequence required for writing PLL_CTL and VR_CTL, so any writes to those registers will not take place until the IDLE instruction is executed, per my previous post.
Since SDRAM is mentioned, I just want to emphasize that PLL registers are in MMR of the processor, not the SDRAM. So when the global variables are defined in SDRAM, after reset (not power cycle), the SDRAM contents are maitained by the SDRAM device with its self-refresh. However, the contents of MMR of the processor are set to default, and then initialized by emulator with the XML values.
So conclusion is that PLL register setting should not be done in XML ,
If at all it is set in XML then Processor may not work as expected is it .
Could you please make this point clear , I will not be setting it on custom board but in case of EZKIT PLL setting is done on the Default what about that should we change it .
With best regards
Yes. You should not use XML to set your PLL. You should configure your PLL in your application code, or in the initcode if you have one.
As a result of this forum question, the following is going to be included in the help files in the next release of VisualDSP++:
Note: Custom board support .xml files do not support setting the reset values for the PLL_CTL or VR_CTL registers. Programming of the PLL requires a PLL relock sequence to allow the clock to stabilize and lock to the new frequency, which cannot be done using the .xml file. Similarly, programming of the on-chip regulator initiates a PLL relock sequence when the processor reaches the programmed voltage level.
Thank you for posting this query!
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