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ADV7391

Question asked by carles on Jul 2, 2012
Latest reply on Aug 7, 2012 by DaveD

We have a EVAL-ADV7391EBZ evaluation board to evaluate your video

encoder. We need to generate a R G B triple analog output (no sync signal

embedded) from your part with an input of a digital parallel input YUV 422

non-interlaced.

 

 

We would like to have your support in order to configure the ADV7391 in this

manner. Do you have some tools to generate the right set of register settings

according to the requirements of the solution which could speed up our

development or can you support us of having this set of register settings. Our

engineering team is quite new working with your part and we would like to have

your support to have it working as soon as possible and to show to our customer

that we are fulfiling their requirements with a demoboard based system.

 

Thank you.

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