I am an open source RTOS developer.
I found the following description in the silicon anormaly of ADSP-BF51x :
05000472 - Incorrect Default MSEL Value in PLL_CTL
The default value of MSEL in the PLL_CTL register is incorrectly set to 0x5. This leads to a violation of the minimum VCO frequency (specified in the data sheet) at boot time.
In the newest HWR rev 1.0 of the BF51x says, the MSEL value in PLL_CTL as default is 5. It is not consistent with above description.
Does it mean, the HWR 1.0 PLL_CTL description is wrong? In other word, will change the deault value of MSEL field of PLL_CTL in the HWR to other value? If yes, please tell me what will you do. I have to know the right MSEL default value in versions to make my program woking correctly.