Good morning. I am going to start a new design containing both DDS AD9951 and DAC AD5445; along with AD5445, I have also OPAMPs, regulators, a voltage reference and so on. In fact, this is a mixed type design (both digital and analog) and it realizes multiple functions, used in a larger system.
I would like to have a suggestion as far as ground separation (I mean Analog GND, AGND and Digital GND, DGND) and PCB layout are concerned mainly for the DDS and DAC chips, since they should share the same board. In this case, to have less noise and spurs steaming from DDS and corrupting DAC output, is it sensible to separate digital and ground planes?
I read that all DDS evaluation boards have a common analog and digital ground plane and they have a 4 layers stack-up. Furthermore, surfing preceeding answers, I found out that, speaking about a reference clock leakage (the DDS involved was AD9954, very similar to AD9951) '...a six layer board for future optimal PCB layout' was recommended by Mr DSB. This is a little bit confusing to me. Could someone be more clear as far as this 6 layers stack-up PCB is concerned?
When you see the evaluation board of DAC AD5445 you can find a neat separation between DGND and AGND. They join together only in one point placed on bottom layer. The last question deals with DAC AD5445: in TSSOP package, pin 3 in GND. In case of ground separation (imposed by DDS constraint) where shoud I tie this pin, to DGND or AGND to have the 'quietest' solution? Thanks a lot for your answers,