In the preliminary datasheet for the ADuCM360, it says the ADC's Integral Nonlinearity (INL) at Gain=1 is +/-15 ppm of FSR (same as in the ADuC7060). If I do the math for the number of accurate bits in this worst-case nonlinearity scenario, it comes to log2(1/15E-6) = 16 bits. This means at some voltage, the ADC is not better than a 16 bit converter?

For example, the LTC2449 has 18.6 bits and the ADS1258 has 18.25 using this same calculation.

Is there a plot available showing the INL? Have I made a mistake in my calculation? Are there different test methods being applied?

Your help is appreciated!

The final datasheet is not available yet - this should be posted to our main website in late-July.

Specifications are not finalized – current datasheet specs are conservative – the INL specification referred to here in particular will be improved.

Message was edited by: Michael Looney To answer MWiggin's questions, your calculation for the overall accuracy of the ADuCM360 ADC based on the INL numbers is correct. In our characterization, we check for no missing codes (24-bits) - to ensure every LSB increment in voltage returns a unique ADC code. For accuracy (INL) testing, we take a large number of points (>100) on the transfer function and compare each result to the ideal value.