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ADV7611 INV_VS(HS)_POL behaviour inverted when CP core bypassed?

Question asked by T.F. Employee on Jun 12, 2012
Latest reply on Jul 23, 2012 by T.F.



When I bypassed the CP core by setting CP_COMPLETE_BYPASS_IN_HDMI_MODE register (IO,0xBF[0]), the behaviour of INV_HS_POL and INV_VS_POL (IO,0x06[1] and [2]) inverts, ie positive polarity HS (VS) is output when INV_HS(VS)_POL=0, and vise versa.


Is it correct behaviour? If so, should representation of the INV_HS(VS)_POL register in the UG-180 always be inverted when CP core is bypassed?


Thanks in advance, TF