I need to increase the WRL pulse width to match the other peripheral device criteria.....
a) WRL width can be changed by increasing wait state ............maximum in TS 201 upto 3 wait cycle.
keeping fixed input crystal frequency (basically SCLK) how way i can increase the WRL pulse width ?
b) Any thing can be done using ACK signal ?
c) need to write some special instruction ?
Please somebody help me regarding this issue.
In my custom TS201 board one DAC (AD7538) required 240 nsc WR pulse , where i am not able to match this
using external crystal (SCLK) 32 MHz.