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Filter taps in sdram0

Question asked by Monsen on May 29, 2012

Hi,

 

Pardon me, if I ask questions which could seem trivial - I  am relatively new to digital signal processors.

I am currently involved in a project where I need to calculate a two FIR filters, from some frequency responses. I am using a BF537 ez-kit on which i am taking the input, filtering it with the calculated filters, and sending it to the output. The code is build up around a modified version of the example Audio Codec Talkthrough.

To have a high frequency resolution the filters are quite long, and as a result of the length they cannot reside in the L1_data ram. The filters currently have 8192 taps each represented in fract32 format. It seems like the only way to go is to place them in the sdram0, but then the access to the filters is too slow and and the audio stutters - even if the filters have fewer taps.

 

Is it possible to setup some kind of DMA to access the data for processing? Would this eliminate the problem?

To rule out that it is the length of filters which is the problem, I generated a 2048 tap filter, and checked the performance when placing it in the L1 ram and sdram. The filtering works in the L1 ram but stutters in the sdram.

 

I have tried setting up a MDMA source channel for the filter taps, but it seems like it doesn't work. Maybe I have misunderstood how the MDMA channel works.

I have set it up with the following code:

 

 


//Setup source DMA for coefficients

*pMDMA_S0_CONFIG = 0x0008; //stopmode

*pMDMA_S0_START_ADDR = lpf32;

*pMDMA_S0_X_COUNT = TAPS;

*pMDMA_S0_X_MODIFY = 4;



//DMA ENABLE

*pMDMA_S0_CONFIG = (*pMDMA_S0_CONFIG | DMAEN);

 

In the Process_Data() function I then poll on the DMA_DONE, Write a 1 to the MDMA_S0_IRQ_STATUS to clear the DMA_DONE and lastly enable the MDMA channel for the next transfer.

 

On a side-note, are the any equation to check how many cycles FIR_fr32 takes to process N taps of a filter? Because I am not sure if the processor is even capable of filtering two filters with that length in the amount of time between interrupts. I found one on the forum for FIR_fr16, but I couldn't find any for fr32 format.

 

Any help is appreciated.

 

Best regards,

Mads

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