AnsweredAssumed Answered

uclinux ppi dma

Question asked by UserAAA on May 23, 2012
Latest reply on May 24, 2012 by Aaronwu


I have own board with bf516 and fpga connected to PPI bus. CMOS sensor thar connected to fpga produces syncs : frame sync, line sync and clk. This signals are present normal at blackfin pins (21,25,26). I've checked it by oscilloscope.

I wrote own module based on bfin_capture.c but without v4l. At first it was fine with ISR that is appears. But there was no image, just noise. Then I decided to set the data bus to constant value - 0x55 for example. I've done it in fpga flex. So sync signals stay as it was and data is always 0x55. Now there is no ISR happens anymore. Why it so? I thought PPI dma transfer is not depends of data.

ps: software is the same in both cases.


24 may

Today I find out another outstanding part out my board. ISR routine happends if at least one of PPI_Dx is connected to periodic signal, like PPI_CLK. I do not know why it happens, I've checked twice all ppi pins for shorts.

I think this question should be answered by one of AD hardware engineers.