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ADV7393 noise/glitch on horzizontal sync

Question asked by Matt... on May 21, 2012
Latest reply on Apr 18, 2013 by emanuele.cardani

Using the video development board with an ADV7401 and a ADV7393, when configured to use the PLL and the Y output in the 10 bit mode the video ends up with garbage/glitches occasionally on the output video during the transisition from the vertical retrace to the start of the horizontal lines of the fields. The glitches occasionally cause a loss of sync during frame grabs.  If we disable the PLL or enable the CVBS mode the glitches go away but our desired mode is to use the PLL in the YPbPr 10 bit mode. Below are the settings being used for the devices. Any idea what is causing the glitches for the desired mode and how to get rid of them? Our source is a low resolution NTSC monochrome source.

 

Issues with sync but the PLL is enabled and the active video looks good. Causes loss of sync.

##CUSTOM##

:Config Settings for 525i, 10bit, Pass Through:

42 05 00 ;

42 06 0A ;

42 1D 47 ;

42 3A 17 ;

42 3B 80 ;

42 3C 32 ;

42 6B C1 ;

42 7B 06 ;

42 85 19 ;

42 86 0B ;

42 8F 77 ;

42 90 1C ;

42 C9 0C ;

42 F3 07 ;

42 0E 80 ;

42 52 46 ;

42 54 00 ;

42 0E 00 ;

42 7B 02 ;

42 7C DC ;

42 7D 00 ;

42 7E EE ;

42 7F 08 ;

42 80 0F ;

54 17 02 ;

54 00 10 ; Disable the all DACs except DAC1 and enable the PLL too

54 01 00 ;

54 0B D2 ;

54 80 10 ;

54 82 C9 ;

54 88 10 ;

50 11 00 ; FPGA - DCMs out of reset

End

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