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ADV7441A-HDMI Clock lock

Question asked by lemonchen on May 8, 2012
Latest reply on May 9, 2012 by DaveD

//720P HDMI receiver

42 03 0C ; Disable TOD

42 05 06 ; Prim_Mode =0110b HDMI

42 1D 40 ; Disable TRI_LLC

42 37 00 ; Disable PCLK

42 68 F0 ; Auto CSC , YPrPb out

42 6B D2 ; Enable 656 mode

42 BA A0 ; Enable HDMI and Analog in

42 C8 08 ; Digital Fine Clamp Start position

62 F0 10 ; ADI Recommended Write

62 F1 0F ; ADI Recommended Write

62 F4 20 ; ADI Recommended Write

//audio

6A 15 EC ; Disable these mute mask bits

6A 1C 49 ; Set MCLKOUT to output 256fs

6A 1D 04 ; & Set Unmute Delay to 1_5 sec.

6A 5A 01 ; Reset Audio Pll

//output embedded video

42 0F bit[4]=0 //set PWRSAV   

42 85 bit[4:3]=01b  //Manual setting: separate HS and VS on the respective pins

42 85 bit[0]=1 //Outputs synchronous

 

// output selection MODE6

        err = adv7441_i2c_read_reg(&adv7840_channel_info[ch_id].i2c_dev.client,0X21,0x6b, &val);

        val &= ~(0x0f);

        val |= 0x03;

        err = adv7441_i2c_write_reg(&adv7840_channel_info[ch_id].i2c_dev.client,0x21 ,0x6b ,val );

        err = adv7441_i2c_read_reg(&adv7840_channel_info[ch_id].i2c_dev.client,0X21,0xC9, &val);

        val &= ~(0x18);

        err = adv7441_i2c_write_reg(&adv7840_channel_info[ch_id].i2c_dev.client,0x21 ,0xC9 ,val );

 

We config the ADV7441A board as the above values.

But there is some problems on  the HDMI port. DVI and HDMI video are all tested.

For example,

    HDMI Map, Address 0x04 [3] sometimes is "0", means No TMDS clock detected on port A.

    HDMI Map, Address 0x068 [7] always is "0", means"Vertical sync filter has not locked and vertical sync parameters are not valid."

Please give me some suggestions, thank you all.

By the way:

We now can receive VGA and CVBS signal with ADV7441A from 720x576 to 1920x1080.

The board is designed by ourselves.

We have layout 2 borad for this project, but still can't resolve this problem.

We have used SiI9135 to receive DVI and HDMI video, it is ok, so I think our layout is OK.

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