I am trying to use ADF4350 for a full frequency range CW generator.
Required frequency step is 10kHz.
While getting realy optimistic overall results sometimes I run into No lock state when changing the frequency.
It happens on some repetitive frequencies only.
To check the situation I have done a slow sweep procedure and checking the behaviour of a CP output.
I discover that by increasing the frequency the CP output is rising as expected and maintaining the pll lock.
But reaching some 1.8V it drops down to 0V. By the datasheet it should be going from 0.25V to 2.5V.
The actual VCO frequency in this case is switched up more than the required frequency.
CP stays at 0V for some frequency steps and when the new required frequency in a sweep reaches the
actual VCO frequency the lock comes back again and the stepping goes further normally.
So from that I conclude the band select logic switches the VCO band too soon.
If this is the case I wonder if the ADF4351 part would have the same issue.
I do the PLL parameters logging while in slow sweep so I can provide the logfile data if necessary.
Logged parameters are: required f_out, LockDetect, calculated f_vco, INT, FRAC, MOD.
The setup is as following:
Programming the ADF is by NXP ARM via SPI interface.
f_out = 137.5MHz to 4400MHz
f_ref = 100MHz
R = 25
Div2 = 1 for 50% PFD duty cycle at 2MHz
f_pfd = 2MHz
BW_loop_filter = 15kHz (f_pfd = 2MHz, I_cp = 2mA)
f_step = 10kHz
MOD = 200 fixed for 10kHz step
BSC = 20
RFdiv = appropriate for the required f_out
N is taken from the f_out and not from the f_vco to lower the INT value.
Any ideas on my problem. Tnx, Luka