We're developing firmware for the ADV7612. When the incoming signal changes to a new interlaced mode, it appears that VERT_FILTER_LOCKED becomes set while HDMI_INTERLACED is still clear. Some time later, HDMI_INTERLACED does set, but by this time we have already begun configuring for a non-interlaced mode. We don't poll HDMI_INTERLACED; we look for VERT_FILTER_LOCKED_RAW change interrupts, and we don't get one in response to the change in HDMI_INTERLACED.
The data sheet suggests that HDMI_INTERLACED should be valid when VERT_FILTER_LOCKED is set. Our observations seem to indicate that this isn't the case.
We're working with the ADV7612-ADV7511 eval board connected to our own processor.