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nor flash can not be recognized by new generated u-boot on bf609-ezkit-0.1 board, but can be recognized by the uboot burned in the spi flash from factory

Question asked by darren on May 5, 2012
Latest reply on May 7, 2012 by Aaronwu

board:bf609-ezkit-0.1

uboot source code download from:http://blackfin.uclinux.org/gf/download/frsrelease/539/9743/u-boot-bf609-ezkit-2012R1-beta1-bf60x.src.tar.bz2

toolchain from:http://blackfin.uclinux.org/gf/download/frsrelease/544/9749/blackfin-toolchain-2012R1-BETA1.i386.tar.bz2

http://blackfin.uclinux.org/gf/download/frsrelease/544/9753/blackfin-toolchain-elf-gcc-4.3-2012R1-BETA1.i386.tar.bz2

http://blackfin.uclinux.org/gf/download/frsrelease/544/9755/blackfin-toolchain-uclibc-default-2012R1-BETA1.i386.tar.bz2

 

 

The only change is that I commented out the line "#define CONFIG_BFIN_BOARD_VERSION_1_0" in file \u-boot-bf609-ezkit-2012R1-beta1-bf60x\include\configs\bf609-ezkit.h

The flash settings are no change

#undef CONFIG_CMD_IMLS

#undef CONFIG_CMD_JFFS2

#define CONFIG_SYS_FLASH_CFI_WIDTH     2

#define CONFIG_FLASH_CFI_DRIVER

#define CONFIG_SYS_FLASH_BASE          0xb0000000

#define CONFIG_SYS_FLASH_CFI

#define CONFIG_SYS_FLASH_PROTECTION

#define CONFIG_SYS_MAX_FLASH_BANKS     1

#define CONFIG_SYS_MAX_FLASH_SECT      131

#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS

 

 

Then I make

#make BF609-EZKIT_config

#make

 

Then download u-boot.bin through TFTP

 

bfin> tftp 0x1000000 u-boot-beta1.bin

Using mii0 device

TFTP from server 192.168.61.103; our IP address is 192.168.61.104

Filename 'u-boot-beta1.bin'.

Load address: 0x1000000

Loading: ###############

done

Bytes transferred = 215116 (3484c hex)

bfin> go 0x1000000

## Starting application at 0x01000000 ...

 

 

 

 

U-Boot 2011.09 (ADI-2012R1) (May 05 2012 - 01:24:17)

 

 

CPU:   ADSP bf609-0.0 (Detected Rev: 0.0) (parallel flash boot)

Board: ADI BF609 EZ-Kit board

       Support: http://blackfin.uclinux.org/

Clock: VCO: 25 MHz, Core: 500 MHz, System0: 100 MHz, System1: 100 MHz, Dclk: 250

MHz

RAM:   128 MiB

Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB

0 Bytes

MMC:   Blackfin SDH: 0

*** Warning - bad CRC, using default environment

 

 

In:    serial

Out:   serial

Err:   serial

KGDB:  [on serial] ready

other init

Net:   mii0

Hit any key to stop autoboot:  0

bfin> flinfo

 

 

Bank # 1: missing or unknown FLASH type

bfin>

 

 

The nor flash can be recognized by the u-boot burned in spi flash from factory, so I think the hardware is good.

I captued log file as below:

U-Boot 2011.09-00233-ga8352c9-dirty (ADI-2012R1-pre) (Apr 06 2012 - 16:59:48)

 

 

CPU:   ADSP bf609-0.0 (Detected Rev: 0.0) (spi flash boot)

Board: ADI BF609 EZ-Kit board

       Support: http://blackfin.uclinux.org/

Clock: VCO: 25 MHz, Core: 500 MHz, System0: 100 MHz, System1: 100 MHz, Dclk: 250

MHz

RAM:   128 MiB

Flash: 16 MiB

MMC:   Blackfin SDH: 0

SF: Detected W25Q32 with page size 4 KiB, total 4 MiB

In:    serial

Out:   serial

Err:   serial

KGDB:  [on serial] ready

other init

Net:   mii0

Hit any key to stop autoboot:  0

bfin> flinfo

 

 

Bank # 1: CFI conformant flash (16 x 16)  Size: 16 MB in 131 Sectors

  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8821

  Erase timeout: 4096 ms, write timeout: 1 ms

  Buffer write timeout: 3 ms, buffer size: 512 bytes

 

 

  Sector Start Addresses:

  B0000000   RO   B0008000   RO   B0010000   RO   B0018000   RO   B0020000   RO

 

 

  B0040000   RO   B0060000   RO   B0080000   RO   B00A0000   RO   B00C0000   RO

 

 

  B00E0000   RO   B0100000   RO   B0120000   RO   B0140000   RO   B0160000   RO

 

 

  B0180000   RO   B01A0000   RO   B01C0000   RO   B01E0000   RO   B0200000   RO

 

 

  B0220000   RO   B0240000   RO   B0260000   RO   B0280000   RO   B02A0000   RO

 

 

  B02C0000   RO   B02E0000   RO   B0300000   RO   B0320000   RO   B0340000   RO

 

 

  B0360000   RO   B0380000   RO   B03A0000   RO   B03C0000   RO   B03E0000   RO

 

 

  B0400000   RO   B0420000   RO   B0440000   RO   B0460000   RO   B0480000   RO

 

 

  B04A0000   RO   B04C0000   RO   B04E0000   RO   B0500000   RO   B0520000   RO

 

 

  B0540000   RO   B0560000   RO   B0580000   RO   B05A0000   RO   B05C0000   RO

 

 

  B05E0000   RO   B0600000   RO   B0620000   RO   B0640000   RO   B0660000   RO

 

 

  B0680000   RO   B06A0000   RO   B06C0000   RO   B06E0000   RO   B0700000   RO

 

 

  B0720000   RO   B0740000   RO   B0760000   RO   B0780000   RO   B07A0000   RO

 

 

  B07C0000   RO   B07E0000   RO   B0800000   RO   B0820000   RO   B0840000   RO

 

 

  B0860000   RO   B0880000   RO   B08A0000   RO   B08C0000   RO   B08E0000   RO

 

 

  B0900000   RO   B0920000   RO   B0940000   RO   B0960000   RO   B0980000   RO

 

 

  B09A0000   RO   B09C0000   RO   B09E0000   RO   B0A00000   RO   B0A20000   RO

 

 

  B0A40000   RO   B0A60000   RO   B0A80000   RO   B0AA0000   RO   B0AC0000   RO

 

 

  B0AE0000   RO   B0B00000   RO   B0B20000   RO   B0B40000   RO   B0B60000   RO

 

 

  B0B80000   RO   B0BA0000   RO   B0BC0000   RO   B0BE0000   RO   B0C00000   RO

 

 

  B0C20000   RO   B0C40000   RO   B0C60000   RO   B0C80000   RO   B0CA0000   RO

 

 

  B0CC0000   RO   B0CE0000   RO   B0D00000   RO   B0D20000   RO   B0D40000   RO

 

 

  B0D60000   RO   B0D80000   RO   B0DA0000   RO   B0DC0000   RO   B0DE0000   RO

 

 

  B0E00000   RO   B0E20000   RO   B0E40000   RO   B0E60000   RO   B0E80000   RO

 

 

  B0EA0000   RO   B0EC0000   RO   B0EE0000   RO   B0F00000   RO   B0F20000   RO

 

 

  B0F40000   RO   B0F60000   RO   B0F80000   RO   B0FA0000   RO   B0FC0000   RO

 

 

  B0FE0000   RO

bfin>

 

So, what's the matter? Please tell me whether I need to modify other place in source code?

thanks!

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