I am testing the evalution board of AD9548 and whenever put a frequence in reference. The software just show "Slow" and never view reference like "Valide".
Why this isto happening??
The most likely cause of this is that the system clock frequency is not correct, and the easiest way to verify this is to:
1. Program the freerun tuning word to 100 MHz. (It's on the DPLL tab of the DPLL configuration window.)
2. Enable the output drivers (on the Clock Distribution window)
3. Sync the outputs (also on the Clock Distribution window)
Verify that the output frequency is indeed 100 MHz.
If it is, the most likely cause of this is setting up a DPLL profile without ensuring that the system clock frequency (at the top of the profile designer spreadsheet) is correct.
I confer all date that say. But It is normal.
I am use the clock of Evaluation Board that is 50 Mhz and reference of de 10 Mhz. Also the reference is in REFB.
The files are in addition for you seen.
Thank you very much.
This has been idle for >1.5 months. I am presuming that this was answered either offline or on its own. If not, please re-post
Here is a brief list of the likely causes:
1. The input frequency tolerance is too tight
2. There is an error in either the system clock frequency
3. There is an error in the input frequency in the DPLL profile.
4. There is a signal integrity problem whereby not every input clock edge is being seen by the part.
5. It's possible that there is a "stale" value in the read-only register, and issuing an IO_UPDATE (R0x0005=0x01) will update the read-only bit.
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