Can i read all 64 bits of the core clock counts in one read instead of
lower = sysreg_read(reg_CYCLES);
upper = sysreg_read(reg_CYCLES2);
The information about CYCLES registers is given in the programming Reference Manual. Didn't you refer that?
It already explains about the coherency.
CYCLES and CYCLES2 are not memory-mapped registers; these are two different system registers (though are part of same 64-bit counter). So, you cannot read both of these registers using sysreg_read64 compiler function. It will likely to give compiler error.
Refer 'sysreg.h' file in the 'Include' directory of VDSP installation. The enumration lists the registers coming under word-sized sysreg reads and writes and registers coming under double-word sysreg reads and writes.
The CYCLES and CYCLES2 registers can be used in word-sized sysreg reads and writes.
You may use compiler functions to return the values as 64-bit: typedef long long clock_t;
volatile clock_t clock_start;
volatile clock_t clock_stop;
clock_start = clock();
clock_stop = clock();
The initial response I received is correct that the sysreg_read(reg_CYCLES) simultaneously stores the upper bits into a shadow register then I don’t need to read 64 bits at once. My main issue was ensuring coherency between the upper and lower clock counts.
Retrieving data ...