AnsweredAssumed Answered

Question about DAI routing for SPORT

Question asked by RRC on Apr 13, 2012
Latest reply on Apr 17, 2012 by RRC

This question is related to thread http://ez.analog.com/thread/6536

 

I have used SPORT3 to load 2 DAC's. Here is the signal routing part

 

lcl_temp = *pDAI_IRPTL_H;         // read the Latch register to clear interrupts  

...

// for DAC1, switch to frame1

SRU(HIGH, PBEN14_I);                                  // enable pin buffer for output  

SRU(HIGH, DAI_PB14_I);                              // keep DAI_P14 (Frame2) at HIGH  

SRU(HIGH, PBEN12_I);                                 // enable pin buffer for output  

SRU(SPORT3_FS_O, DAI_PB12_I);          // DAI_P12 to SPORT3 Frame1 

SRU(SPORT3_FS_O, MISCA2_I);              // feed DAI_P12 (Frame1) to MISCA2  

// now write to DAC1

...

// for DAC2, switch to frame2

    SRU(HIGH, PBEN12_I);                             // enable pin buffer for output  

    SRU(HIGH, DAI_PB12_I);                         // keep DAI_P12 (Frame1) at HIGH         

    SRU(HIGH, PBEN14_I);                             // enable pin buffer for output  

    SRU(SPORT3_FS_O, DAI_PB14_I);       // DAI_P14 to SPORT3 Frame2 

    SRU(SPORT3_FS_O, MISCA2_I);           // feed DAI_P14 (Frame2) to MISCA2  

// now write to DAC2

...

I have tested the above program, it worked fine.

Now I need to add DAC3 to be controlled by SPORT3, too.

If I borrow DB_O from SPORT2, can I define it as Frame3 and still share the CLK and DA lines from SPORT3? In other words, will the follwoing additional code work?

// for DAC3, switch to frame3

    SRU(HIGH, PBEN12_I);                             // enable pin buffer for output  

    SRU(HIGH, DAI_PB12_I);                          // keep DAI_P12 (Frame1) at HIGH         

    SRU(HIGH, PBEN14_I);                             // enable pin buffer for output  

   SRU(HIGH, DAI_PB14_I);                           // keep DAI_P14 (Frame2) at HIGH  

    SRU(HIGH, PBEN10_I);                             // enable pin buffer for output  

    SRU(SPORT3_FS_O, DAI_PB10_I);       // DAI_P10 to SPORT3 Frame3

    SRU(SPORT3_FS_O, MISCA2_I);           // feed DAI_P10 (Frame3) to MISCA2  

// now write to DAC3

...

I have tried to read through chapter 9 of the ADSP-214xx hardware reference, esp. Figure 9-14, but still not sure if this is allowed.

Outcomes