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AD9117 DCLKIO & CLKIN

Question asked by jhasson on Apr 13, 2012
Latest reply on Apr 19, 2012 by Tguy

The AD911x family of DACs have 2 clock input pins - DCLKIO and CLKIN. DCLKIO is to be sourced from FPGA and is used to clock in the data. CLKIN is the sampling clock. The design I'm working on has space limitations, so I would prefer to tie both pins together. Is this acceptable or is an external source preferred?

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