I'm running into a problem with using the DMA urgency fields (particularly FIFO_RWM) in the EPPIx_CONTROL register under a specific set of conditions. I am configured in 16-bit word mode, and I am attempting to receive just 2 words over the PPI bus. I realize this type of very short one-shot transfer is not the intended use of a PPI bus, but it seems to be within the bounds of functionality described in the HRM. I have a generic driver that will accept application-level requests to transfer 1 to 2^16 words, and so this type of really short transfer is within the bounds of what I'm attempting to support. All transfers are type GP with 1 external frame sync.
When I leave the FIFO_RWM field at a value of 00b, it works correct for any transfer size. However, when I try to set the FIFO_RWM field to a value of 11b (25% full), the data is not received for very small transfer such as 1, 2, or 3 words. If I attempt a larger transfer, say 512 words, the interface works fine. I have not tried to identify the exact value at which it transitions from non-working to working.
When the FIFO_RWM field is set to a non-zero value for a receive scenario, my understanding is that the initial DMA transfer is not kicked off until the FIFO has accumulated enough words to reach the regular watermark. In my scenario, I believe the transfer in its entirety does not reach that point, and so the data is never moved from the FIFO to L3, even after the PPI transfer count has been satisfied.
Is this plausible? For what it's worth, I am setting the SYNC bit in the DMA config register as well. I am using a BF547 rev 0.3.