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AD5372 questions

Question asked by hjvanderlinden on Apr 1, 2012
Latest reply on Apr 1, 2012 by hjvanderlinden

I am designing a product with an AD5372 DAC. I am having a couple of problems. I would

really appreciate if an expert from Analog could help me out with this.

 

1) the DAC outputs are not monotonous and seem to make no sense compared to the

formulas for calculating the DAC outputs

2) I cannot get SPI readback to check the content of the OFS, X, C and M registers.

 

I think I have exhausted all my options and can't see other things I have overseen.

What I have checked:

 

1) change Vref from 5V to 3V3

2) that the /busy signal is handled correctly. My code polls the /busy line and writes after /busy goes high again

3) SPI timing is correct

4) data written is correct

5) serial data write direction is correct

6) reset the OFS, X, C and M registers to their defaults

7) set all the registers to 0x0000 except M which was kept at 0xFFFF

 

I have attached files displaying the DAC output results vs DAC_Values and I have

included traces from my logic analyzer. I hope somebody from Analog can help me

out...

 

Also I was wondering if there is a way to check if the DAC is broken?

 

Regards,

Heiko

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