The DMA finish command (valid only in RX mode) ensures that the PPI issues a FINISH Command through the DDE(Distributed DMA Engine) CMD line upon the completion of a FRAME/LINE. The FINISH Command is issued during the next SCLK cycle after completely transferring the last word of the FRAME/LINE. The Finish Command causes the current work unit to terminate processing of the current work unit and move on to the next.
A case where the PPI RX DMA stalls due to non availability of system bus, the PPI FIFO could overflow. This would result in data loss at the DMA/PPI boundary which could ultimately result in PPI frame boundary losing synchronization with the DMA work units. The PPI FINISH command ensures that PPI frames ultimately sync up with the DMA work unit boundaries at a later point. There could be loss of a frame or data corruption (lesser number of data) in one or two intermediate frames. This would be intimated to the software by the PPI FIFO overflow interrupt. But the PPI would not lose synchronization with the DMA work units. The PPI issues a DDE finish command with the last data of every PPI frame. This makes sure that a new frame is aligned to a new work unit. In effect, the VSYNC/HSYNC is passed onto the DMA controller, and the DMA uses the VSYNC/HSYNC to start the next work unit. Software can program the DMA counters to exactly match the active data count of the PPI and the PPI controls the end of the work unit.