AnsweredAssumed Answered

FPGA & Parallel flash connecting on the AMI

Question asked by dshambi on Mar 27, 2012
Latest reply on Mar 30, 2012 by Mitesh

Hi ,

My design incude the ADSP-21469 connecting to an external parallel flash memory-8 bit data bus (RC28F00AM29EWL) and to  FPGA (Cyclone 3) Via the AMI bus ( the FPGA is connected to MS0 and the flash to MS1).
according to the aboved connection i have 2 questions :

1. when i write to the flash for some reason it writes to 2 consecutive addresses for example , if i write to address 0x04000000 the data 0xaa i will read 0xaa from address 0x04000000 and from 0x04000001 , i think its probably a packing problem but i didnt manage to point where i done wrong.

2. Since the FPGA is connecting to MS0n its internal addresses are common with the DDR2 (that also connected on my board) , i have mange to control the lines of the AMI in that case using the EPCTL Register but i think the adresses is some how shifted for example internal address

0x0020 0000 (with EPCTL , B0SD bit turninig to AMI) supposed to reflect address 0x000000 on the AMI ADDRESS bus is correct or there is another tranlation form the internal memory to the AMI ADDRESS ?

I will very apperciate your fast respond since this issue is critical to me.

Best regards

Dotan

Outcomes