The Link Port receiver has a 4-deep FIFO. However, this depth of size 4 can be utilized only in a worst case scenario, where the ACK reaches the transmitter very late due to board delays. In all other cases the receiver must be thought of having only a 3-deep FIFO. Below image gives a FIFO level representation of how the ACK is generated. Gray areas indicate filled data and white areas indicate free space. The ACK is pulled low as soon as 1st byte of the 3rd location (last but one) is received.