Que >> In the previous BF processors, WDSIZE field of the DMA configuration register determines the DMA transfer word size. So, I was configuring this field as per my peripheral data size.
But when using BF60x DMA, how to determine the size of PSIZE and MSIZE fields of DMA Configuration register?
1] PSIZE determines the bus width between DMA module and peripheral (Peripheral Bus). It must be configured according to width of peripheral.
- If Serial Port word length is configured for less than or equal to 8-bits (SLEN <= 7), then PSIZE field must be configured as 0 (1 byte)
- If Serial Port word length is configured between 9-bits to 16-bits (8 <= SLEN < =15), then PSIZE field must be configured as 1 (2 byte)
- If Serial Port word length is configured between 17-bit to 32-bits (16 <= SLEN <= 31), then PSIZE must be configured as 2 (4 byte)
There is no bursting on the peripheral bus. So, each DMA request/grant results in a single peripheral access.
2] MSIZE determines the bus width between DMA module and processor memory (Memory Bus). There can be bursting on this bus. So, this field can be assigned to any value to set the memory bus width to 1, 2, 4, 8, 16, 32 bytes. However, for optimum use of DMA bus bandwidth, the higher value can be preferred.
But as mentioned in HRM, the DMA Transfer Start Address (DMA_ADDRSTART ) and Transfer Increment values ( DMA_XMOD and/or DMA_YMOD ) must be a multiple of the memory transfer unit size. Otherwise 'misaligned address access' error can occur.
#pragma align NB
pragma can be used before Data buffer definition to align it's address to NB number of bytes.
The MSIZE setting also affects DMA_XCNT register setting. If I configured SPORT in 8-bit word length format, then to transmit 512 bytes of buffer
- if MSIZE = 0(1byte) - I should set DMA_XCNT as 512 with DMA_XMOD=1
- if MSIZE = 5(32bytes) - I should set DMA_XCNT as 16 (i.e. 512/32) with DMA_XMOD=32
....assuming DMA is configured in 1-D addressing