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Have there been any modifications/additions in the RSI registers on BF60x processors?

Question asked by Mitesh Employee on Mar 22, 2012

Yes, there have been significant changes in the RSI registers on BF60x processors than the previous Blackfin processors. These are listed as below:

 

  1. RSI Power Control Register (RSI_PWR_CONTROL) - This register is removed and all the bits of this register are moved to the RSI Configuration Register (RSI_CFG).
  2. RSI Configuration Register (RSI_CFG) - Bits [9:14] are added from (RSI_PWR_CONTROL) register.  PD_DAT3 (bit 7) is now reserved and feature is removed. Additional bits are added for Boot Mode support for MMC cards.
  3. RSI Command Regsiter (RSI_CMD) – CRCDIS (bit 11) and CHKBUSY (bit 12) are added to support CRC check disable and Card Busy detection features.
  4. RSI Clock Control Register (RSI_CTL earlier called as RSI_CLK_CONTROL) - Bits [13:15] are added to this register. These bits indicate the type of card that is connected to RSI. These bits can be programmed after identifying the type of card that is connected. This information will be used in few commands like Sleep, Wakeup. Hence it needs to be programmed before the Sleep or Wakeup command is sent.
  5. RSI Data Control Register (RSI_DATA_CTL) - DATA_BLK_LGTH (4-7) is removed and moved to a new RSI BLKSZ register. Unlike DATA_BLK_LGTH field, this register holds the size of each block in bytes. So, for block size of 512 bytes, the register should be initialized with a value of 512.
  6. RSI Boot Timing Counter (BOOT_TCNTR) – This register is added to support the MMC Boot Mode. It holds the boot setup and hold time counters.
  7. RSI Boot Acknowledge Timeout Register (BACK_TOUT) - This register is added to support the MMC Boot Mode. It holds the boot acknowledgement timeout value.
  8. RSI Sleep-Wakeup Timeout Register (SLP_WKUP_TOUT) – This register is added to support the MMC Sleep Mode. It hols the sleep/wakeup timeout value.
  9. RSI Exception Status Register (RSI_STAT0 earlier called as RSI_ESTAT) - Bits [8:17] and [30:31] are newly added for Boot mode, Sleep mode and card busy functionality.
  10. RSI Exception Mask Register (RSI_ IMSK0 earlier called as RSI_EMASK) - Bits [8:17]  are newly added for Boot mode, Sleep mode and Card Busy functionality.

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