I have followed the ADF4106 and ADF4108 data sheets and ADIsimPLL to design a 5300MHz source (see attached). The design uses the ADF4108 and a Z-comm V940ME02 VCO. Also using the Analog Devices INT-N software - Rev 7.0.5 (Nov 2011) and the usb to parallel interface in the EVAL-ADF4106EBZ1.
I can connect to the ADF4108, and I think I can write to the registers (in order, Init, then R, then N, then Func), because I can make the Muxout pin do the appropriate things (GND, Vdd, N count, R count all look good).
The problem I have is that the CPO never goes into the linear range of operation - it sits at either GND (when the Phase Detect Polarity is set to Positive) or Vdd (when Phase Detect Polarity is set Negative).
1) if the Muxout - N-divider-output gives good pulses on a scope, can I assume the chip is getting adequate RF signal for a lock?
2) if the Muxout - R-divider-output gives good pulses on a scope, can I assume the chip is getting adequate Ref signal for a lock?
3) Is there a simulation tool that will give me the simulator register setting to program into the IC? (Maybe I have a bad setup in the INT-N software?)
Any caveats using the ADF4108 instead of the ADF4106? Originally I thought I was going to need to go to 7 GHz, but now the design is such that I can operate below 6GHz . Would I be better off using the ADF4106 - the data sheet is a bit more complete....
Thanks for any advice!