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How to get fixed DOUT from AD9949

Question asked by sunnyliu on Mar 14, 2012
Latest reply on Mar 15, 2012 by EBarnes


I have a design using AD9949 connected with a FPGA, the Fpga is used to set up the AD9949 registers and provide CLI, VD and HD.The DOUT from AD9949 are sent back to Fpga.

I want to write a piece of FPGA selftest code to validate the connection between FPGA and AD9949. I want to setup the BLACK LEVEL CLAMP register value and let the DOUT output this value. Is that possible? If yes, what other registers should I set up, and what other signals should I use, CLPOB, PBLK, HBLK? Or is there other way to get fixed DOUT output(I mean several, like 000000000, 1111111111, 0101010101)?