Do we have to pull down all the 3 Strap pin to put the device in test mode or Is it fine to pull down the respective strap pin one by one to check their respective output.
With best regards and wishes
You may pull down only those strap pins that need to behave as strap pins. But it is desirable to have external pulldown or pullup on all other pins. Please find below text copied form EE-179.
"Due to the lack of determinism in the sample point and output enable for the strap pins, they must not be driven by an FPGA, ASIC, or other device. An external pullup or pulldown of sufficient strength must be used to set the
Please refer to EE-179, which gives the recommendation on how to connect these pins. I am pasting it here.
"To assist in debugging it is recommend that designers include an option for placing three optional pull-down resistors (typically 500 Ω) between the Test Mode Strap pins and VSS. It is also recommended that designers include an option for placing three optional pull-up resistors (typically 500 Ω) between the Test Mode Strap pins and VDD_IO. These resistors can be added or removed to enable and disable each specific test mode signal."
Since we are already communicating via private forum, we cna continue the discussion there.
Hope this helps
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