I have a unit which uses the ad73322L analog front end. It works very well in a 3-chip cascaded formation. If I have, for example,
8 units produced, the 1st of the 3 cascaded 73322 chips on 4 of the units will convert audio input A/D producing 16-bits values 0 -> 65535 as the audio input level increases. The 1st of the 3 cascaded 73322 chips on the other 4 units will convert audio input A/D producing 16-bits values 65535 -> 0 as the audio level increases, which is reverse logic. I am having trouble determining why, given everything appearing to be the same, the 16-bit A/D values are exactly reversed in polarity.
Would anyone have any ideas?
In addition, Register F has only the SEEN bit set. The analog input circuitry is the "Single-Ended-to-Differential Conversion".