I'm in the process of designing a small front-end for an FPGA board, and the AD7352/6/7 family is exactly what we need for our application.
From the datasheets alone, it seems these devices have pretty much the same guts and function in the same way, but there is one single sentence that bugs in the AD7357 datasheet that doesn't appears in the others :
From page 18:
There is a single sample delay in the result that is clocked out from the AD7357 and later
Note that the data that is accessed on SDATAA and SDATAB is the result of the previous conversion.
Since these lines don't appear in the AD7356 datasheet even though the devices seem to be pretty much the same functionally, am I right to assume that the AD7372/6 ADCs don't have this delay ?