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ADV7184-ADV7391 genlock problems

Question asked by tok on Mar 2, 2012
Latest reply on Apr 2, 2012 by tok

   We create the device for superposition overlay graphics on the television image presented by composite video signal cvbs_in. On an device

output it is necessary to form composite video signal cvbs_out which should be locked to cvbs_in. Color subcarrier frequency and phase should be

same, as at cvbs_in.
   The structure of our device is shown in the attachment.
   Digital video mixer combines video_in_data and overlay_video_data. Genlock control compensates a processing delay of video decoder and video

encoder, therefore video timing of cvbs_in and cvbs_out is absolutely identical. Video_out_data are clocked impulses LLC_27MHz from video

decoder, the SFL signal is connected directly from decoder to encoder.
   Digital format of video_in_data and video_out_data is 8-bit ITU-R BT.656 YCbCr 4:2:2.
   The device contains the quartz crystal oscillator making system clock xtal_27MHz. Input clock for video decoder xtal_28.636MHz produces a

frequency synthesizer in conformity with: 28.636MHz = 27MHz *35/33.
   In our device we have two problems.

  1. Subcarrier frequency lock.
   1.1. Encoder SFL input is disabled.
   ADV7391 register 0x84 bits (2:1) = 00.
   Cvbs_in and cvbs_out color subcarrier frequencies are strictly equal, their mutual phase is stable, but not equal zero. It is obvious, that cvbs_in

video source and ours ADV7391 encoder calculate frequency of color subcarrier identically.
   1.2. Decoder SFL output and encoder SFL input are enabled.
   ADV7184 register 0x04 bits (1) = 1.
   ADV7391 register 0x84 bits (2:1) = 11.
   Cvbs_in and cvbs_out color subcarrier frequencies are not equal (differ a few Hz), their mutual phase is instable. It happens in both PAL and

NTSC modes. It is revealed, that frequency of color subcarrier of cvbs_out depends on frequency xtal_28.636MHz, but does not depend from

   It is our first problem.
   1.3. Decoder SFL output is disabled, encoder SFL input is enabled.
   ADV7184 register 0x04 bits (1) = 0.
   ADV7391 register 0x84 bits (2:1) = 11.
   Cvbs_out completely degrades - color subcarrier is absent, video sync is disturbed. It, maybe, is normal.
   1.4. Video decoder has such parameter:
        Fsc Subcarrier Lock Range - + /-1.3 Hz (Typ)
        (Lock Time Specifications, ADV7184 Data Sheet, page 6)
        What does it amount to?

   Thus, we cannot achieve our purpose - to find equability of frequency and a phase of color subcarrier of cvbs_in and cvbs_out. What can you

advise us?

  2. Video decoder PLL jitter.
   In NTSC mode, if frequency LLC_27MHz on an output of the video decoder becomes close to frequency of the crystal oscillator xtal_27MHz (a

difference of frequencies less than 200 Hz), arises jitter of signals LLC_27MHz and video_in_data. This jitter (up to 100 ns), finally, causes

handicapes in work of the video encoder on an output cvbs_out. If the difference of frequencies LLC_27MHz and xtal_27MHz is more than 200 Hz,

all is OK.
   In PAL mode, all always OK.
   It is our second problem.

   We hope for your help in the resolve of above problems.

   Best Regards,