Synchronization output signal as HS,VS and DE output unstably,
when input signal connector is removed and ADV7612 is free run state.
Can non-active setting be done ?
In other words, can signal level which does not affect backend circuit be set ?
If possible, please let me know the information about setting.
Current setting is below
CP MAP address0xba=0. 0:Free run Disable
As the result of taking into account system characterization
Existence or non-existence of synchronization signal is used for decreasing the time to lock input speed.